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MATLAB Central - Author - Edwin Pasterkamp
Phase Locked Loop tutorial A tutorial showing how Phase-Locked Loops, both analog and digital can be efficiently modeling in Si Author: Edwin
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MATLAB Central - Files
allpass bpsk carrier cic digital filters farrow fec filter analysis filter design fir fractional delay iir multirate pll polyphase psk31 qpsk recov
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Untitled
ADC16DV160 - Dual Channel, 16-Bit, 160 MSPS Analog-to-Digital Converter with DDR LVDS Outputs
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56800/E Digital Signal Controller Products
Digital Signal Processors & Controllers Digital Signal Processors and Controllers
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EETimes.com | Electronics Industry News for EEs & Engineering...
Programming Digital Video using DaVinci? Technology and MontaVista Linux Tuesday, October 31 8:00am PT/11:00am ET Sponsored by Texas Instruments Live
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Virtex-5
XAPP873 - Virtex-5 FPGA Interface for Fujitsu Digital-to-Analog Converters with LVDS Inputs (PDF)
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A Type and Effect System for Deterministic Parallel Java
A novel type and effect system, together with a language called DPJ, enforces deterministic semantics Language - Programming - FAQs Help and Tutorials - Social Sciences - Arts
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Adobe, Saleforce.com Team Up for Flash Builder for Force.com
An IDE for building cloud-based RIAs Adobe Flash Builder 4 - Adobe Flash - Multimedia - Flash Builder - FAQs Help and Tutorials
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This Week's Developer Reading List
The Cloud, Windows 7, OO, and Ruby Microsoft Windows - Ruby - Windows 7 - Operating system - FAQs Help and Tutorials
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Using Erlang to Build Reliable, Fault Tolerant, Scalable Systems
A case study in rebuilding Yahoo! Harvester Sponsored Topics: Erlang - Programming - Languages - Contributions - FAQs Help and Tutorials
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MIPS in handsets: Why not?
ISA in PCs is due to Microsoft Windows' exclusive support. Sponsored Topics: Microsoft Windows - Operating system - FAQs Help and Tutorials - Windows 7 - Windows
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Lansdale Semiconductor, Inc.
Parallel-Input PLL Frequency Synthesizer ML145151
The ML145151 is programmed by 14 parallel–input data lines for the N counter and three input lines for the R counter. The device features consist of a reference oscillator, selectable– reference divider, digital–phase detector, and 14–bit programmable divide–by–N counter. |
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Lansdale Semiconductor, Inc.
Serial-Input PLL Frequency Synthesizer ML145157
The ML145157 has a fully programmable 14–bit reference counter, as well as a fully programmable ÷ N counter. The counters are programmed serially through a common data input and latched into the appropriate counter latch, according to the last data bit (control bit) entered. |
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Lansdale Semiconductor, Inc.
Serial_Input PLL Frequency Synthesizer ML145158
The ML145158 has a fully programmable 14–bit reference counter, as well as fully programmable ÷ N and ÷ A counters. The counters are programmed serially through a common data input and latched into the appropriate counter latch, according to the last data bit (control bit) entered. |
